CMOS amplifiers having the ability to accept common mode input voltages varying between the supply voltage rails are required in many applications, including input buffers and output drivers involving large signal swings.
An input circuit arrangement for providing a large common mode voltage input range employing a pair of complementary differential pairs is discussed in several articles: J. A. Fisher and R. Koch, "A highly linear CMOS buffer amplifier," IEEE Journal of Solid State Circuits, Vol. 22, pp. 330-334, June 1987; M. Pardoen and M. Degrauwe, "A rail-to-rail input/output CMOS power amplifier," Proc. Custom Integrated Circuits Conference, pp. 25.5.1-4, May 1989; J. F. Duque-Carillo, J. M. Valverde and R. Perez-Aloe, Constant G.sub.m rail-to-rail common mode input stage with minimum CMRR degradation, IEEE journal of Solid State Circuits, Vol. 28, pp. 661-666, June 1993; and W-C. Wu, W. J. Helms, J. A. Kuhn and B. E. Byrkett, "Digital-compatible high-performance operational amplifier with rail-to-rail input and output stages," IEEE Journal of Solid State Circuits, Vol. 29, pp. 63-66, January 1994. The output currents from the two pairs are summed together using current mirrors or can be directly injected into a folded cascode stage as discussed in J. A. Fisher and R. Koch, "A highly linear CMOS buffer amplifier," IEEE Journal of Solid State Circuits, Vol. 22, pp. 330-334, June 1987; and M. Pardoen and M. Degrauwe, "A rail-to-rail input/output CMOS power amplifier," Proc. Custom Integrated Circuits Conference, pp. 25.5.1-4, May 1989.
In the simplest form of this circuit, the tail current for each pair is held constant. Unfortunately, that arrangement leads to large variations in the net transconductance of the input stage as the common mode input voltage is varied. This large variation in net transconductance is undesirable because it leads to large variations in the unity gain frequency of the amplifier which makes optimal frequency compensation difficult to achieve especially in high frequency designs.
If the differential pairs are operated in the weak inversion region, i.e. , barely turned on, the transconductance is approximately proportional to the tail current. Then the large variation in net transconductance can be avoided by fixing the sum of the tail currents. The drawback of the weak inversion approach, however, is that the drain current will be relatively low for a given transistor size which in turn adversely impacts other factors such as slew rate.
Even for transistors operated in moderate to strong inversion regions, fixing the sum of the tail currents to a constant value reduces the large variation in net transconductance by a factor of .sqroot.2, Although a substantial improvement in reducing the variation of net transconductance results, a substantial variation is still present over the common mode input voltage range.
As a result there is a need for a differential amplifier having a constant net transconductance over the entire common mode input voltage range.